Akin, Bilal

Permanent URI for this collectionhttps://hdl.handle.net/10735.1/6674

Bilal Akin is an Associate Professor of Electrical Engineering, a Senikor Member of the IEEE, and the Principal Investigator of the Power Electronics Lab. His research interests include:

  • Renewable and Smart Energy Systems
  • Digital Power Control and Management
  • Design and Control of Electric Motors & Drives
  • Electric & Hybrid Electric Vehicle Applications
  • Fault Diagnosis & Condition Monitoring of Industrial Components and Energy Conversion Units
  • DSP Based Energy Conversion Systems, Power Electronics and Industry Applications
  • Applications of Modern Control Theory and Signal Processing to Energy Systems and Industrial Processes

ORCID page


Recent Submissions

Now showing 1 - 10 of 10
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    First-Principle Prediction on STM Tip Manipulation of Ti Adatom on Two-Dimensional Monolayer YBr₃
    (Wiley-Hindawi, 2019-02-04) Liu, Pan; Wu, Maokun; Liu, Hui; Lu, Feng; Wang, Wei-Hua; Cho, Kyeongjae; 0000-0003-2698-7774 (Cho, K); 369148996084659752200 (Cho, K); Cho, Kyeongjae
    Scanning tunneling microscopy (STM) is an important tool in surface science on atomic scale characterization and manipulation. In this work, Ti adatom manipulation is theoretically simulated by using a tungsten tip (W-tip) in STM based on first-principle calculations. The results demonstrate the possibility of inserting Ti adatoms into the atomic pores of monolayer YBr₃, which is thermodynamically stable at room temperature. In this process, the energy barriers of vertical and lateral movements of Ti are 0.38eV and 0.64eV, respectively, and the Ti atoms are stably placed within YBr₃ by >1.2eV binding energy. These theoretical predictions provide an insight that it is experimentally promising to manipulate Ti adatom and form artificially designed 2D magnetic materials.
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    A Robust Method for Induction Motor Magnetizing Curve Identification at Standstill
    (Institute of Electrical and Electronics Engineers Inc., 2019) Erturk, Feyzullah; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); 0000-0002-5775-0019 (Erturk, F); Erturk, Feyzullah; Akin, Bilal
    Modern electric drives use a self-commissioning procedure to precisely identify motor parameters for achieving high-performance control. Typically, the induction motor magnetizing curve is identified using no-load rotational test. However, some applications necessitate the electric drive to identify the magnetizing curve at standstill conditions. As one of the well-known standstill approaches, the traditional flux integration exhibits several practical problems. Any imperfection in measured current, estimated stator resistance, and dead-time compensation directly affects the accuracy of the estimated magnetizing curve because of error accumulation in open-loop integration. This paper proposes a robust yet simple solution against those practical concerns. It can identify the magnetizing curve without using any dead-time compensation and stator resistance. Only industry-standard dc-link voltage and phase current measurements are used. Its superior features are experimentally verified on a number of motors and the results are confirmed by no-load rotational test results. Its robustness against current offset and extra longer integration duration is also proved.
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    Analysis of Vₜₕ Variations in IGBTs Under Thermal Stress for Improved Condition Monitoring in Automotive Power Conversion Systems
    (Institute of Electrical and Electronics Engineers Inc, 2018-11-12) Ali, Syed Huzaif; Ugur, Enes; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Ali, Syed Huzaif; Ugur, Enes; Akin, Bilal
    Today, power conversion in automotive industry depends heavily on the reliable operation of insulated-gate bipolar transistors (IGBTs). Condition monitoring of IGBTs and reporting imminent faults to driver dashboard are critical for avoiding any fatal accidents. In this study, first, a comprehensive comparison is carried out between on-state collector-emitter drop (V_{ce,on}) with gate threshold voltage (Vₜₕ), as two reliable aging precursors. In order to enrich current understanding of IGBT aging prognosis, accelerated aging methods are applied under a wide variety of thermal stresses. Aging mechanisms and physical phenomena responsible for variation in both V_{ce,on} and Vₜₕ have been methodically investigated. These explanations are also supported by detailed failure analysis. Based on the extensive result sets for tested samples from different manufacturers with different structural types, it is found that V_{ce,on} show different trends at different stress levels, whereas under the same test conditions Vₜₕ provides more consistent and robust state-of-health information. Finally, an example experiment has been performed in which continuous V_{ce,on} measurements coupled with Vₜₕ information has been used to provide more insight about the device aging as well as faults in an automobile's sub-systems.
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    Impact of Threshold Voltage Instability on Static and Switching Performance of GaN Devices with p-GaN Gate
    (Institute of Electrical and Electronics Engineers Inc., 2019-03-17) Yang, Fei; Xu, Chi; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Yang, Fei; Xu, Chi; Akin, Bilal
    The p-GaN gate technology has been adopted to realize enhancement-mode GaN devices. However, the blocking voltage can cause the threshold voltage to drift in p-GaN devices In this paper, the impact of the threshold voltage instability on the static and switching performance of the p-GaN device is studied. Specifically, a Vₜₕ measurement circuit is first designed which is able to characterize the threshold voltage after applying a minimum high voltage pulse of 2 μs. From the experimental result, an increase of more than 0.7 V in Vₜₕ is observed within several μs after blocking the high voltage. The static characteristics of the same device are compared before and after blocking the high voltage, and a reduced knee point in the output characteristic is observed at a low gate-to-source voltage. Due to the static characteristic variation, the switching performance of the device is also changed after stressed with the high drain-to-source voltage. Specifically, from the double pulse test result at 400 V/25 A with R₉ =20 Ω, more than 20% increase of turn-on loss is recognized after blocking the high voltage for 30 minutes. The turn on loss difference is minimized when the gate resistance value is reduced to 0 Ω. For the turn-off loss, the impact of Vₜₕ's shift is negligible. Detailed analysis is also provided to explain the experimental result. It is concluded that higher gate drive voltage and lower gate resistance helps to minimize the threshold voltage instability's effect on the device's performance. © 2019 IEEE.
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    Design of a High-Performance DC Power Cycling Test Setup for SiC MOSFETs
    (Institute of Electrical and Electronics Engineers Inc., 2019-03-17) Yang, Fei; Ugur, Enes; Pu, Shi; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Yang, Fei; Ugur, Enes; Pu, Shi; Akin, Bilal
    In this paper, a high-performance DC power cycling setup dedicated for SiC power MOSFETs is presented. Different from the previous DC power cycling setup designs focusing on circuit topology and operation principle, this paper discusses the detailed design considerations to ensure the measurement accuracy and control the voltage spikes within the safe voltage range of the data acquisition (DAQ) equipment. Specifically, the transient behavior of the circuit is analyzed, and a simulation model is built in LTspice to facilitate the design. From the simulation result, it is observed that the gate timing control is critical to limit the measurement spikes. In addition, adding decoupling capacitors helps to attenuate the ringing noise in the voltage measurement. A prototype is built, and the experimental results indicate that a precise measurement can be realized with the proposed DC power cycling setup under various conditions. © 2019 IEEE.
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    Advanced Severity Monitoring of Interturn Short Circuit Faults in PMSMs
    (Institute of Electrical and Electronics Engineers Inc., 2019-04-25) Qi, Yuan; Zafarani, Mohsen; Gurusamy, Vigneshwaran; Akin, Belal; 0000-0001-6912-7219 (Akin, B); 0000-0003-4697-8664 (Qi, Y); 0000-0002-3714-5081 (Zafarani, M); 0000-0002-9366-1777 (Gurusamy, V); Qi, Yuan; Zafarani, Mohsen; Gurusamy, Vigneshwaran; Akin, Belal
    This paper presents a new method to estimate the severity level of interturn short circuit (ITSC) fault in permanent magnet synchronous machines (PMSMs). Instead of evaluating the fault severity by the number of shorted turns, the proposed method directly estimates the short circuit current, which is the most critical variable in ITSC faults. In the proposed method, the short circuit current generates voltage fluctuation on back electromotive force (EMF), which can be obtained via a proportional-integral (PI) estimator in the two-axis stationary reference frame. Based on the number of shorted turns information, the magnitude of the short circuit current can be estimated through the voltage fluctuation. Since the short circuit current is the main cause of deterioration in the ITSC fault, the proposed method provides an effective and straightforward way to monitor the ITSC fault. More importantly, the findings in this paper are beneficial for the fault mitigation algorithms and postfault operations. In order to verify the findings, a three-phase equivalent circuit model supported by finite element analysis (FEA) is used in the simulation. In addition, various experiments are carried out on a faulty PMSM to validate the proposed method. © 2015 IEEE.
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    Degradation Assessment and Precursor Identification for SiC MOSFETs under High Temp Cycling
    (Institute of Electrical and Electronics Engineers Inc., 2019-01-07) Ugur, Enes; Yang, Fei; Pu, Shi; Zhao, S.; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Ugur, Enes; Yang, Fei; Pu, Shi; Akin, Bilal
    Silicon carbide (SiC) power mosfets are promising alternatives to Si devices in high-voltage, high-frequency, and high-temperature applications. The rapid and widespread deployment of SiC devices raises long-term reliability concerns, particularly for mission and safety critical systems due to limited field data and potential uncertainties. Therefore, it is essential to investigate progressive degradations and parameter shifts in SiC devices to develop system integrated degradation monitoring tools for self-monitoring converters, which can recognize failure precursors at the earliest stage and prevent catastrophic failures. This paper presents a comprehensive long-term reliability analysis of commercially available SiC mosfets under high temperature operation and high temperature swing, degradation related key precursors, and possible causes behind them. For this purpose, discrete SiC devices are power cycled and all datasheet parameters are recorded at certain intervals with the aid of the curve tracer. Variation of electrical parameters throughout the tests is presented in order to assess their correlation with the aging/degradation state of the switch. Among them, gate oxide charge trapping related threshold voltage drift and corresponding on state resistance variation has been observed for all samples. For some samples, bond wire heel cracking is found to be the root cause of sudden on state resistance and body diode voltage increases. The discussions regarding aging precursors are supported by failure analysis obtained through the decapsulation of failed devices. Finally, the findings are evaluated in order to define the suitability of electrical parameters as an aging precursor parameter under the light of practical implementation related issues. ©1972-2012 IEEE.
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    Real-Time Ageing Detection of SiC MOSFETs
    (Institute of Electrical and Electronics Engineers Inc.) Erturk, Feyzullah; Ugur, Enes; Olson, J.; Akin, Bilal; 0000-0001-6912-7219 (Akin, B); Erturk, Feyzullah; Ugur, Enes; Akin, Bilal
    This paper presents a comprehensive study on degradation monitoring of SiC MOSFETs and proposes an early warning method to detect ageing. The proposed plug-in tool can be integrated to smart gate drivers or directly to power converters. During the accelerated ageing tests (power cycling within safe operating area) several electrical parameters are monitored to find out critical signatures and precursors of failure. Among those, gate leakage current is identified as the most practical precursor which exhibits consistent changes in all aged devices and is relatively easy to monitor. Due to its simple scheme and low cost, it can potentially be embedded into commercial gate drivers featuring improved reliability options. ©2018 IEEE
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    A New LMS Algorithm Based Dead-Time Compensation Method for PMSM FOC Drives
    (Institute of Electrical and Electronics Engineers Inc.) Tang, Zhuangyao; Akin, Bilal; 0000-0002-8704-3884 (Tang, Z); 0000-0001-6912-7219 (Akin, B); Tang, Zhuangyao; Akin, Bilal
    This paper presents a new least-mean-square (LMS) algorithm based dead-time compensation method to suppress the current distortion in permanent-magnet synchronous motor (PMSM) field-oriented control (FOC) drives. Compared to conventional average value compensations, the proposed method is robust to switching device parameter variations thanks to the online adaptation capability of the LMS algorithm. Similarly, the disturbance observer compensators are also immune to switching device parameter variations; however, varying motor parameters degrades their compensation performance. Without prior knowledge of switching device or motor parameters, the proposed method can directly reduce the dead-time current harmonics by generating compensation voltage references. In addition, the proposed method is easy to implement since it doesn't require voltage errors estimation or current harmonics extraction which are necessary for disturbance observer and adaptive filter based methods. The proposed method is tested on a 2.5 kW voltage-source inverter (VSI) PMSM drive controlled by FOC algorithm. Its effectiveness is validated by both experimental results and spectrum analysis.
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    A Fast Phase Variable abc Model of Brushless PM Motors under Demagnetization Faults
    (Institute of Electrical and Electronics Engineers Inc.) Mazaheri-Tehrani, E.; Faiz, J.; Zafarani, Mohsen; Akin, Bilal; 0000-0002-3714-5081 (Zafarani, M); 0000-0001-6912-7219 (Akin, B); Zafarani, Mohsen; Akin, Bilal
    This paper addresses a simple and computationally efficient dynamic model for brushless permanent magnet (PM) motors under PM demagnetization faults. The impact of stator slots and spatial disposition of the windings are taken into account to improve the accuracy of a lumped-parameter abc model. This model is suitable for tracking the dynamic behavior of fault components as it can be accompanied by any control scheme and/or be used for model-based fault detection schemes. In addition, parameters of this model can be automatically tuned by an optimization process in the off-line phase of the healthy machine. Finite element simulations are carried out for proving the effectiveness of the proposed model. Verifica-tion is done in both time and frequency domains for four PM motors with different rotor and stator configurations. The simulation results are experimentally verified.

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